A mixed-signal design is a combination of tightly interlaced analog and digital circuitry. Next-generation automotive, imaging, IoT, 5G, computing, and storage markets are driving the strong demand for increasing mixed-signal content in modern systems on chips (SoCs). Chips are getting bigger, better, and more sophisticated. As designs complexity has multiplied, verification complexity has exploded The “Shift Left” trend has been around for over a decade. The idea is to verify early in the design cycle resulting in better products, fewer re-spins, faster time to market, and lower cost. Shift Left is driving the adoption of new verification methodologies. However, when it comes to mixed-signal designs, it gets a bit complicated due to the complexity of interactions between analog and digital.

Digital verification methodologies are mature, structured, and have mastered the art of automation. Analog verification, on the other hand, traditionally relied on direct verification methods. While this might have been sufficient in the past, growing design size and complexity require more comprehensive and automated verification of mixed-signal SoCs. The advent of new digital verification technologies — such as constrained-random data generation, assertion-based verification, coverage-driven verification, formal model checking, and Intelligent Testbench Automation to name a few — have changed the way we see functional verification productivity.

Analog verification teams must go beyond traditional approaches like directed tests, sweeps, corners, and Monte Carlo analysis. Teams need to adopt digital verification techniques to enable regression testing of mixed-signal SoCs. These techniques include automated stimulus generation, real number modeling, coverage, and assertion-driven verification combined with low-power verification and automated debug.

Most of these advanced new technologies have not been extended to verify mixed-signal design challenges. This could be due to a lack of knowledge, lack of standards, or lack of EDA technologies to support these methodologies in the mixed-signal domain. Typically, digital verification engineers use a top-down methodology while analog designers use a bottom-up approach. Recognizing the advantages of a top-down methodology, there is a paradigm shift happening to adopt it for analog and mixed-signal designs. In this workshop, we will discuss these digital-centric mixed-signal verification methodologies to improve SoC verification throughput and improve time to market. The session will include a presentation, a live demo, and Q&A.

Sumit Vishwakarma